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Home » News » Archive » General News » Power Optimization in FDSOI Design: Conference Recap & Insights

Power Optimization in FDSOI Design: Conference Recap & Insights


November 21, 2025 −

Efficient power optimization is becoming increasingly critical as power budgets tighten and design complexity continues to grow. At the recent Design And Reuse IP-SoC 2025 Conference in Grenoble, our colleague Dennis Zetzsche presented a structured and practical approach to tackling this challenge.

In his session, Dennis explored how advanced power-management techniques can be effectively enabled in FDSOI-based SoCs without compromising performance or silicon area. His talk outlined a balanced methodology that combines several key optimization strategies, including:

  • Power Gating
  • Dynamic Voltage and Frequency Scaling (DVFS)
  • Adaptive Body Biasing (ABB)

A highlight of the presentation was the demonstration of Adaptive Body Biasing using Racyics’ ABX IP, showcasing precise control of body-bias domains. To bring these concepts together, Dennis also shared a case study illustrating how these techniques can be integrated into a single SoC using the Racyics ULP IP platform.

In addition to the session, our team hosted a booth at the event, where visitors experienced a live demonstration of the ABX unit and engaged in in-depth technical discussions around our power management solutions.

If you’re interested in learning more about the ABX platform or the methodologies presented, feel free to reach out to our team.

A imaging showing the title of a presentation called "Enabling Advanced Power Optimization Features in FDSOI-base SoCs"
Below the title is a head from Dennis Zetzsche, who will held the presentation. He is a Senior AMS IC Design Engineer.

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